Lead Advanced Microelectronics Packaging Design Engineer

El Segundo, CA

Employer:	Boeing
Category:	Engineering
Description
Job Description At Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Defense Space & Security has an exciting opportunity as a Lead Advanced Microelectronics Packaging Design Engineer . Come join us as part of our Electronics Packaging team located in El Segundo, CA . Packaging Electronics team focuses the majority of their time on Satellite missions. However, our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line - approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems).. Using first principals thinking, Engineers will work on electronic packaging designs and take it from cradle to grave. Working within a collaborative team environment, surrounded by world class engineers and mentors, you will design within the full life cycle and see your work from proposal all the way to delivery and production. We're highly supportive of innovative thinking, we respect and acknowledge hard work, we recognize maturity and integrity, and we reward bottom-line achievement. At Boeing, we value your curiosity, your determination, and your imagination. #YouWillChangeTheWorld Position Responsibilities: Designing and optimizing layout for advanced substrates of HDI IC substrate, Silicon, or LTCC substrates, considering electrical, thermal, and mechanical requirements. Collaborate in multi-functional discussions for package architecture and technology roadmap (partner with Silicon IC team to optimize chip Floorplan and bump placement). Cross-functional interface with IC design, materials, SI/PI, thermal, systems, and production teams to optimize package solutions on cost, performance, manufacturability, and reliability Interface with packaging assembly and substrate suppliers for new product bring-up, qualification and production ramp Interface with other operations functional groups such as product engineering, foundry, test, and QA Create and execute substrate breakout patterns for ASIC packaging Optimize package pinouts by evaluating system-level trade-offs - Conduct package routing, placement, stack-up, reference plane, and power distribution activities Conduct design feasibility studies to assess package design goals encompassing size, cost, and performance Develop symbols and CAD library databases using Cadence APD or Mentor Xpedition tools Works under minimal direction Basic Qualifications (Required Skills/Experience): Ability to obtain a U.S. Security Clearance Bachelor of Science degree from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), chemistry, physics, mathematics, data science, or computer science 5 years of experience as a substrate designer or 9+ years of professional experience with substrate layout design Hands-on experience with package design and proficient in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP) or Mentor Xpedition platform tools. Preferred Qualifications (Desired Skills/Experience): Experience with TSV, 2D/2.5D and 3D package connection. Hands-on expertise of advanced and new assembly processes for flipchip, wirebond, and MCM packages SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters and RLGC model. Substrate manufacturing process, structure, design rules and material property. Solid understanding of high-speed interfaces, including DDR, PCIe, NAND, etc. Consistent track record to drive package selection through feasibility studies and drive chip Floor planning and bump assignment. Familiar with package design reviews and familiarity with CAM350/Valor or Calibre and CAD. Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs, EMI/RFI, PCB/package resonance). Familiar with Cadence Concept HDL for schematic review, experience in schematic capture and system integration. Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers Understanding of layout considerations for device matching, coupling and noise isolation Knowledge of advanced substrate manufacturing/process Knowledge of failure analysis techniques on advanced node silicon products Conceptual knowledge of package cost structure Knowledge of GD&T and be able to read/comprehend mechanical drawings Excellent oral and written communication skills and ability to communicate across multiple disciplines with internal and external customers Computer proficiency and ability to use and navigate the internet and various computer software programs (e.g. Microsoft Office Suite) Skill and ability to collect, organize, synthesize, and analyze data; summarize findings; develop conclusions and recommendations from appropriate data sources. Drug Free Workplace: Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies. Total Rewards & Pay Transparency: At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities. The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work. The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements. Pay is based upon candidate experience and qualifications, as well as market and business considerations. Summary pay range: $126,650 - $171,350 Applications for this position will be accepted until Jun. 27, 2025 Export Control Requirements: This position must meet export control compliance requirements. To meet export control compliance requirements, a "U.S. Person" as defined by 22 C.F.R. §120.15 is required. "U.S. Person" includes U.S. Citizen, lawful permanent resident, refugee, or asylee. Export Control Details: US based job, US Person required Education Bachelor's Degree or Equivalent Required Relocation This position offers relocation based on candidate eligibility. Security Clearance This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Top Secret Clearance Post-Start is required. Visa Sponsorship Employer will not sponsor applicants for employment visa status. Shift This position is for 1st shift Equal Opportunity Employer: Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

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Lead Advanced Microelectronics Packaging Design Engineer

El Segundo, CA

Description